28. 1. 2020  1:03 Alfonz
Akademický informační systém

Sylabus předmětu B-LS - Logical systems (FEEIT - WS 2019/2020)

     Informačný list          ECTS          Sylabus          

     Slovenština          Angličtina          

University: Slovak University of Technology in Bratislava
Faculty: Faculty of Electrical Engineering and Information Technology
Course unit code: B-LS
Course unit title: Logical systems
Mode of delivery, planned learning activities and teaching methods:
lecture2 hours weekly (on-site method)
seminar2 hours weekly (on-site method)

Credits allocated: 6
Recommended semester/trimester: Electronics - bachelor (compulsory), 1. semester
Robotics and Cybernetics - bachelor (compulsory), 1. semester
Telecommunications - bachelor (compulsory), 1. semester
Level of study: 1.
Prerequisites for registration: none
Assesment methods:
There will be one written test for 40 points during the semester. Each student has to earn at least 22 points over the test.
Then, a student has to pass a written exam for the maximum of 60 points.

In order to get the credits for the subject, a student has to gain at least 56 points, altogether for the test and the exam.
Learning outcomes of the course unit:
By completion of this subject, a student will gain knowledge of Boolean algebra, forms and minimization of logic functions, and implementation of basic and complex logic functions using logic gates. He/she will also understand the principles and main parameters of logic circuits realized using switches as well as the main principles of combinational and sequential logic circuits. A student will be able to model, analyze and design basic logic circuits.
Course contents:
Boolean algebra and Boolean functions. Normal conjunctive and normal disjunctive forms. De Morgan's theorems. Minimization of logic functions. Basic and complex logic gates. Combinational logic circuits. Realization of logic functions using switches. Implementation of basic and complex logic gates in CMOS technology. Memory elements - latches and flip-flop registers. Sequential logic circuits. Finite state machines. Synchronous and asynchronous sequential circuits.
Recommended or required reading:
KAPRÁLIK, P. -- GALANOVÁ, J. -- POLAKOVIČ, M. Logické systémy. Bratislava : STU, 2009. 167 p. ISBN 978-80-227-3205-5.
KINEY, L. -- ROTH, C. Fundamentals of Logic Design. Stamford, USA: Cengage Learning, 2010. 780 p. ISBN 0-495-47169-0.
FRIŠTACKÝ, N. -- KOLESÁR, M. Logické systémy. Bratislava : Alfa, 1990. 591 p. ISBN 80-05-00414-1.

Language of instruction: slovak or english
Courses evaluation:
Assessed students in total: 492

2,8 %5,9 %9,3 %20,3 %31,3 %30,4 %
Name of lecturer(s): Ing. Daniel Arbet, PhD. (instructor) - slovak, english
Mgr. Mária Budejovská (instructor)
Ing. Martin Feiler (instructor) - slovak, english
Ing. Ladislav Kočkovič (instructor) - slovak, english
Ing. Ľuboš Podlucký (instructor) - slovak, english
Ing. Miroslav Potočný (instructor) - slovak, english
prof. Ing. Viera Stopjaková, PhD. (examiner, lecturer, person responsible for course) - slovak, english
Ing. Michal Šovčík (instructor) - slovak, english
Ing. Martin Ziman (instructor) - slovak, english
Last modification: 7. 5. 2019
Supervisor: prof. Ing. Viera Stopjaková, PhD. and programme supervisor

Last modification made by RNDr. Marian Puškár on 05/07/2019.

Typ výstupu: