Oct 21, 2019   11:08 a.m. Uršuľa
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Course syllabus B-AP - Computer Architecture (FEEIT - SS 2018/2019)


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University: Slovak University of Technology in Bratislava
Faculty: Faculty of Electrical Engineering and Information Technology
Course unit code: B-AP
Course unit title: Computer Architecture
Mode of delivery, planned learning activities and teaching methods:
lecture2 hours weekly (on-site method)
laboratory/construction practice2 hours weekly (on-site method)

 
Credits allocated: 6
 
Recommended semester/trimester: Electronics - bachelor (compulsory), 2. semester
Robotics and Cybernetics - bachelor (compulsory), 2. semester
Telecommunications - bachelor (compulsory), 2. semester
Level of study: 1.
Prerequisites for registration: none
 
Assesment methods:
Active presence at labs. (max. one time not presence for accepted reason). Minimum 5 points for each of three term tasks for points with total maximum of 40 points. Exam test for maximum of 60 points
 
Learning outcomes of the course unit:
Student will be delivered basic digital computers components subsystems principles. Components contains Central processing unit, digital bus systems, memory subsystem and Input{output subsystem of the digital computer.. Student will be able to understand basic concepts of digital computers including multi CPU and multicomputer systems Attendant will be able to understand causes for must to encode information inside of digital computer and principles how to do them.
 
Course contents:
Basic computing concepts. Moore´s law, Basic computer components realization . Data organization , data representation, data encoding . Numerical systems and conversions between them. Basic logical operations , Half -and Full- Adder, negative integer data encoding and rational numbers encoding including floating point data . Arithmetical operations (integer and floating point) . Computer internal memory systems, memory cell (ROM, SRAM, DRAM, Flash), memory types (RAM, LIFO, FIFO, CAM...). External memories - data storage principals (hard disk drives, SSD, CDROM, DVD), Data organization, peripheral interfaces , disk arrays . Memory subsystem management , physical and logical addressing, virtual addressing , cache memory. CPUs – basic functions, components, structure, sequential and stream processing , scalar and super-scalar processors muticore processors, CISC and RISC processors, vector and matrix CPUs . I/O subsystem of computer, realization principles, Interrupt request subsystem , DMA, parallel interface, serial buses, wireless interfaces, computer networks , Internet. Internal computer buses , its functions, parameters control and hierarchical bus structure . Multiprocessor systems (with types of its interconnections), multicomputer systems , cloud computing. Goals and tools for automatic data acquisition, role of sensors , A/D, D/A converters , Real-Time systems. Operating systems, its basic functionalities, types of OS. Computers classification CPU performance metrics. History and perspective trends of the computing
 
Recommended or required reading:
Basic:
STALLINGS, W. Computer organization and architecture: Designing for performance. Upper Saddle River : Prentice Hall, 1996. 682 p. ISBN 0-13-359985-X.
SHIVA, S G. Advanced computer architectures. Boca Raton : CRC Press, 2006. 335 p. ISBN 0-8493-3758-5.
ABD-EL-BARR, M. -- EL-REWINI, H. Fundamentals of computer organization and architecture. Hoboken : John Wiley & Sons, 2005. 273 p. ISBN 0-471-46741-3.
CLEMENTS, A. The Principles of Computer Hardware. Oxford : Oxford University Press, 2000. 716 p. ISBN 0-19-856453-8.
HORÁK, J. Hardware: Učebnice pro pokročilé. Brno : Computer Press, 2007. 360 p. ISBN 978-80-251-1741-5.
MESSMER, H. -- DEMBOWSKI, K. Velká kniha hardware. Praha : Computer Press, 2005. 1224 p. ISBN 80-251-0416-8.
GOOK, M. Hardwarová rozhraní: Průvodce programátora. Brno : Computer Press, 2006. 463 p. ISBN 80-251-1019-2.

 
Language of instruction: slovak or czech or english
 
Notes:
 
Courses evaluation:
Assessed students in total: 1956

ABCDEFX
14,4 %21,8 %29,1 %21,8 %10,7 %2,2 %
Name of lecturer(s): Ing. Michal Dobiš (examiner, instructor)
prof. Ing. Peter Hubinský, PhD. (person responsible for course)
Ing. Marian Kľúčik (examiner, instructor)
Ing. Juraj Slačka, PhD. (examiner, instructor, lecturer) - slovak, english
Ing. Jaromír Stanko (examiner, instructor)
Ing. Michal Tölgyessy, PhD. (examiner, instructor) - slovak, english
 
Last modification: 11. 4. 2018
Supervisor: prof. Ing. Peter Hubinský, PhD. and programme supervisor


Last modification made by RNDr. Marian Puškár on 04/11/2018.

Type of output: