Jun 18, 2019   4:59 a.m. Vratislav
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Persons at STU


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prof. Ing. Viera Stopjaková, PhD.
Identification number: 1939
University e-mail: viera.stopjakova [at] stuba.sk
 
Profesorka CSc.,PhD. - Institute of Electronics and Phototonics (FEEIT)
Vice-dean - Faculty of Electrical Engineering and Information Technology
 
External colleague - Faculty of Informatics and Information Technologies (STU)
External colleague - Institute of Computer Engineering and Applied Informatics (FIIT)

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The selected person is an author of the following publications.

Ord.PublicationsType of resultYearDetails
1.An ultra low-voltage rail-to-rail comparator for on-chip energy harvesters
Nagy, Lukáš -- Stopjaková, Viera -- Arbet, Daniel -- Potočný, Miroslav -- Kováč, Martin
An ultra low-voltage rail-to-rail comparator for on-chip energy harvesters. AEÜ International Journal of Electronics and Communications, 108. p. 10--18.
articles in magazines2019Details
2.High side power MOSFET switch driver for a low-power AC/DC converter
Potočný, Miroslav -- Brenkuš, Juraj -- Stopjaková, Viera
High side power MOSFET switch driver for a low-power AC/DC converter. In DDECS 2019. Danvers: IEEE, 2019, ISBN 978-1-7281-0072-2.
contributions in anthologies, chapters in monographs/textbooks, abstracts2019Details
3.Investigation of low-voltage, sub-threshold charge pump with parasitics aware design methodology
Kováč, Martin -- Arbet, Daniel -- Stopjaková, Viera -- Šovčík, Michal -- Nagy, Lukáš
Investigation of low-voltage, sub-threshold charge pump with parasitics aware design methodology. In DDECS 2019. Danvers: IEEE, 2019, ISBN 978-1-7281-0072-2.
contributions in anthologies, chapters in monographs/textbooks, abstracts2019Details
4.Low latency hardware-accelerated dynamic memory manager for hard real-time and mixed-criticality systems
Kohútka, Lukáš -- Nagy, Lukáš -- Stopjaková, Viera
Low latency hardware-accelerated dynamic memory manager for hard real-time and mixed-criticality systems. In DDECS 2019. Danvers: IEEE, 2019, ISBN 978-1-7281-0072-2.
contributions in anthologies, chapters in monographs/textbooks, abstracts2019Details
5.Performance analysis of ESD structures in 130 nm CMOS technology for low-power applications
Nagy, Lukáš -- Chvála, Aleš -- Marek, Juraj -- Potočný, Miroslav -- Stopjaková, Viera
Performance analysis of ESD structures in 130 nm CMOS technology for low-power applications. In Radioelektronika 2019. Piscataway: IEEE, 2019, p. 28--33. ISBN 978-1-5386-9321-6.
contributions in anthologies, chapters in monographs/textbooks, abstracts2019Details
6.Sensor node as an energy-autonomous active implantable medical device
Stopjaková, Viera -- Kováč, Martin -- Potočný, Miroslav -- Arbet, Daniel
Senzorický uzol ako aktívna, energeticky autonómna implantovateľná zdravotnícka pomôcka. labMED, p. 31--35.
articles in magazines2019Details
7.Ultra low-voltage rail-to-rail comparator design in 130 nm CMOS technology
Nagy, Lukáš -- Arbet, Daniel -- Kováč, Martin -- Potočný, Miroslav -- Stopjaková, Viera
Ultra low-voltage rail-to-rail comparator design in 130 nm CMOS technology. In DDECS 2019. Danvers: IEEE, 2019, ISBN 978-1-7281-0072-2.
contributions in anthologies, chapters in monographs/textbooks, abstracts2019Details

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