Persons at STU
This page displays all publicly accessible information about the desired person. Some information about the person's occupation and offices may be hidden.
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| Contacts | Graduate | Lesson | Final thesis | ||||
| Projects | Publications | Curriculum vitae | Supervised theses |
The selected person is an author of the following publications.
| Ord. | Publications | Type of result | Year | Details |
|---|---|---|---|---|
| 1. | A new hardware-accelerated scheduler for soft real-time tasks Kohútka, Lukáš -- Stopjaková, Viera A new hardware-accelerated scheduler for soft real-time tasks. In MECO 2019. Piscataway: IEEE, 2019, p. 110--113. ISBN 978-1-7281-1739-3. | contributions in anthologies, chapters in monographs/textbooks, abstracts | 2019 | |
| 2. | A on-chip energy harvester system for low voltage applications Stopjaková, Viera -- Arbet, Daniel -- Nagy, Lukáš -- Kováč, Martin -- Potočný, Miroslav -- Šovčík, Michal -- Rakús, Matej -- Kohútka, Lukáš A on-chip energy harvester system for low voltage applications. In EUROPRACTICE: Activity report 2018-2019. Heverlee : imec, 2019, p. 51--53. | contributions in anthologies, chapters in monographs/textbooks, abstracts | 2019 | |
| 3. | Automated evaluation of neurophysiological signals Beňo, Dávid -- Kohútka, Lukáš Automatizované vyhodnocovanie neurofyziologických signálov. Diploma thesis. 2019. | final thesis | 2019 | |
| 4. | Automatic translation between VHDL and Verilog languages Štefaňák, Marián -- Kohútka, Lukáš Automatický preklad medzi jazykmi VHDL a Verilog. Bachelor thesis. 2019. | final thesis | 2019 | |
| 5. | Automatics translation between VHDL and Verilog languages Orčová, Mária -- Kohútka, Lukáš Automatický preklad medzi jazykmi VHDL a Verilog. Bachelor thesis. 2019. | final thesis | 2019 | |
| 6. | FPGA-based task scheduler for mixed-criticality real-time systems Kohútka, Lukáš -- Stopjaková, Viera FPGA-based task scheduler for mixed-criticality real-time systems. In iCCECE ’19. Piscataway: IEEE, 2019, p. 5--10. ISBN 978-1-7281-2138-3. | contributions in anthologies, chapters in monographs/textbooks, abstracts | 2019 | |
| 7. | Graphical representation of neurophysiological signals Moravčík, Marko -- Kohútka, Lukáš Grafická reprezentácia neurofyziologických signálov. Diploma thesis. 2019. | final thesis | 2019 | |
| 8. | Hardware dynamic memory manager for hard real-time systems Kohútka, Lukáš -- Nagy, Lukáš -- Stopjaková, Viera Hardware dynamic memory manager for hard real-time systems. Annals of Emerging Technologies in Computing, 3. p. 48--70. | articles in magazines | 2019 | |
| 9. | Low latency hardware-accelerated dynamic memory manager for hard real-time and mixed-criticality systems Kohútka, Lukáš -- Nagy, Lukáš -- Stopjaková, Viera Low latency hardware-accelerated dynamic memory manager for hard real-time and mixed-criticality systems. In DDECS 2019. Danvers: IEEE, 2019, ISBN 978-1-7281-0072-2. | contributions in anthologies, chapters in monographs/textbooks, abstracts | 2019 | |
| 10. | Web application for sale a desktop application and license management Jurík, Juraj -- Kohútka, Lukáš Webová aplikácia pre predaj desktopovej aplikácie a manažment licencií. Bachelor thesis. 2019. | final thesis | 2019 |