Oct 25, 2020   2:19 a.m. Aurel
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Ing. Lukáš Kohútka, PhD.
Identification number: 5813
University e-mail: lukas.kohutka [at] stuba.sk
Odborný asistent CSc.,PhD. - Institute of Informatics, Information Systems and Software Engineering (FIIT)
Výskumný pracovník s VŠ vzdelaním - Institute of Electronics and Phototonics (FEEIT)
External colleague - Faculty of Informatics and Information Technologies (STU)

     Lesson     Final thesis
Curriculum vitae

Basic information

Basic information about a final thesis

Type of thesis:
Dissertation thesis
Thesis title:Hardware Architectures of Real-Time Kernels
Written by (author):
Ing. Lukáš Kohútka, PhD.
Institute of Electronics and Phototonics (FEEIT)
Thesis supervisor:
Opponent 1:prof. Ing. Lukáš Sekanina, PhD.
Opponent 2:prof. Ing. Miloš Drutarovský, CSc.
Final thesis progress:Final thesis was successfully defended.

Additional information

Additional information about the final thesis follows. Click on the language link to display the information in the desired language.

Language of final thesis:

Slovak        English

Title of the thesis:
Hardware Architectures of Real-Time Kernels
This PhD thesis is focused on real-time embedded systems and possibilities of their improvement via hardware acceleration that uses novel, proposed architectures. By implementing formerly software algorithms in hardware, their asymptotic time complexity can be reduced, sometimes even down to constant time complexity. The constant time complexity is very important for algorithms applied in real-time operating systems because it directly affects the overall predictability and determinism of real-time systems, which is very important for correct behavior of real-time systems. In addition to that, response time of the real-time tasks can be also significantly reduced by hardware acceleration. The quality of real-time systems can be noticeably improved by providing a new hardware platform for real-time systems, which could lead to more complex and efficient real-time systems too. This thesis deals with efficiency and flexibility of hardware accelerated real-time task scheduling, as one of the most crucial parts of such platform for real-time systems. The improved efficiency and flexibility is achieved by various new architectures for real-time task schedulers and for min/max queues, which were identified as the main influencers of the efficiency of task schedulers. Analysis performed within this thesis consists of real-time systems attributes, real-time operating systems and their parts, existing algorithms used in real-time operating systems, existing hardware architectures and existing techniques of hardware acceleration in general. Existing hardware accelerators focused on real-time operating systems were analyzed too. According to this analysis, there is a lot of space for improvement because the existing accelerators have too limited functionality and they are using less efficient architectures. This PhD thesis is aimed at the development of several hardware architectures for real-time task schedulers with better attributes than the existing ones and to evaluate the developed architectures to make sure that these architectures are correct and they are really better either in terms of efficiency (e.g. performance or resource costs) or in terms of flexibility (e.g. more complex systems with mixed criticality are handled relatively easily). Real-time systems based on the proposed architectures should have better attributes so that more complex and more efficient real-time systems could be created in shorter time.
Key words:
task scheduling, hardware acceleration, coprocessors, real-time systems

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