Jul 20, 2019   9:21 a.m. Iľja
Academic information system

Summary of topics offered - Faculty of Electrical Engineering and Information Technology


Basic information

Type of work: Bachelor thesis
Topic: Integrácia IP jadra do FPGA dosky
Title of topic in English: Integration of IP core into FPGA board
State of topic: approved (prof. Ing. Daniel Donoval, DrSc. - Study programme supervisor)
Thesis supervisor: Ing. Lukáš Kohútka, PhD.
Faculty: Faculty of Electrical Engineering and Information Technology
Supervising department: Institute of Electronics and Phototonics - FEEIT
Max. no. of students: --
Academic year:2018/2019
Proposed by: Ing. Lukáš Kohútka, PhD.
Summary: IP jadrá predstavujú hardvérové akcelerátory, ktoré sú opísané v jazyku VHDL alebo Verilog a realizovateľné v FPGA technológii. Analyzujte možnosti komunikácie medzi vybraným akcelerátorom (IP jadrom), procesorom pre vybrané FPGA a SoC dosky s použitím procesoru ARM, Microblaze alebo Nios II. Na základe analýzy vyberte jednu dosku a procesor, a navrhnite integráciu vybraného akcelerátora (IP jadra) do danej dosky tak, aby bola komunikácia medzi procesorom a akcelerátorom funkčná a efektívna. Riešenie implementujte a vhodne otestujte.



Limitations of the topic

To sign up for a topic it is necessary to fulfil one of the following restrictions

Limit to study programme
The table shows limitations of study programme, field, track the student has to be enrolled in to be able to register for a given topic.

ProgrammeTrackTrack
B-ELN Electronics-- not entered -- -- not entered --

Limit to courses
The table shows limitations of a course the student has to complete to be able to register for a given topic.

DepartmentCourse title
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