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Advanced parametric test methods for reliability enhancement of mixed-signal circuits and systems

Supervisor: prof. Ing. Viera Stopjaková, PhD.

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Project description:The main goal of this project is research and development of new advanced methods for on-chip parametric test of analog and mixed-signal integrated circuits (IC) in order to provide their high reliability. Analysis of new physical defects and failure mechanisms in deep submicron technologies that cause significant reduction of technology yield and reliability of low-power, low-voltage integrated circuits produced in those technologies. Improvement of electrical models of the respective faults and development of complementary built-in parametric test methods and techniques for high defects coverage, and analysis of possible implementation of the developed methods in real production tests of mixed-signal IC. Implementation of artificial intelligence and digital signal processing in the developed test methods. Development of the measurement hardware usable in real IC test applications. Evaluation of the developed test methods on an experimentally designed mixed-signal integrated circuit.
Kind of project:VEGA ()
Department:Department of microelectronics (FEEIT)
Project identification:1/0285/09
Project status:Successfully completed
Project start date :01. 01. 2009
Project close date:31. 12. 2012
Number of workers in the project:2
Number of official workers in the project:0